Gangadhar Akurathi, Suneel kumar Guntuku and K.Babulu
Jawaharlal Nehru Technological University, India

A CAM is used for store and search data and using comparison logic circuitry implements the table lookupfunction in a single clock cycle. CAMs are main application of packet forwarding and packet classification in Network routers. A Ternary content addressable memory(TCAM) has three type of states‘0’,’1’ and ‘X’(don’t care) and which is like as binary CAM and has extra feature of searching and storing. The ‘X’ option may be used as ‘0’ and ‘1’. TCAM performs high-speed search operation in a deterministic time. In this work a TCAM circuit is designed by using current race sensing scheme and butterfly matchline (ML) scheme. The speed and power measures of both the TCAM designs are analysed separately. A Novel technique is developed which is obtained by combining these two techniques which results in significant power and speed efficiencies.

Content Addressable Memory (CAM) Circuit, XOR-based conditional keeper, Ternary Content Addressable Memory (TCAM)Circuit,Pseudo-Footless Clock Data Pre-charge Dynamic Match line (PF-CDPD)Architecture.