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An Optimized Device Sizing of Two-Stage CMOS OP-AMP Using Multi-Objective Genetic Algorithm

Authors

E.Srinivas1, N.Balaji2 and L.Padma sree2
1Jawaharlal Nehru Technological University, Hydrebad, 2Jawaharlal Nehru Technological University, Vijayanagaram, 3VNR Vignana Jyothi Institute of Engineering and Technology, India

Abstract

A novel approach for optimizing the transistor dimensions of two stage CMOS op-amp using Multi-Objective Genetic Algorithm (MOGA) is presented. The proposed approach is used to find the optimal dimensions of each transistor to improve op-amp performances for analog and mixed signal integrated circuit design. The aim is to automatically determine the device sizes to meet the given performance specifications while minimizing the cost function such as power dissipation and a weighted sum of the active area. This strongly suggests that the approach is capable of determining the globally optimal solutions to the problem. Exactness of performance prediction in the device sizing program (implemented in MATLAB) maintained. Here Six parameters are considered i.e., open loop gain, Phase Margin (PM), Area (A), Bandwidth of unity Gain (UGB), Power Consumption (P) and Slew Rate (SR). The circuit is simulated in cadence(Virtuoso Spectre) 0.18um CMOS technology.

Keywords

Analog Design, complementary metal-oxide-semiconductor (CMOS), Optimization, Two-Stage Operational Amplifier, Multi-objective Genetic Algorithm (MOGA).