Ashok Kumar Adepu and Kiran Kumar Kolupuri,
MVGR College of Engineering, India

A low power low voltage 8-bit Digital to Analog Converter consisting of different current sources in binary weighted array architecture is designed. The weights of current sources are depending on the binary weights of the bits. This current steering DAC is suitable for high speed applications. The proposed DAC in this paper has DNL, INL of ±0.04, ±0.05 respectively and the power consumption of 16.67mw.

This binary array architecture is implemented in CMOS 0.13μ m 1P2M technology has good performances in DNL, INL and area compared with other researches.

Current Steering, Binary Weighted, Current Source, INL(Integral Non Linearity), DNL (Differential Non Linearity), Power.